With continuous development of semiconductor technology, semiconductor devices are desired to have high device density with high degree of integration in order to obtain a high operation speed, large data storage and more functions. Gate lengths of transistors are thus becoming narrower and shorter than ever. As a result, short channel effect is more likely to occur.
Currently, there are several solutions for suppressing the short channel effect. One of the solutions is to increase the resistance between the source and drain by forming lightly doped regions in the source and drain or using a semiconductor on insulator (SOI) substrate. Another solution is to reduce carrier mobility in the channel region between the source and the drain, by overly doping ions with opposite conductivity type into channel regions, pocket regions and/or halo regions.
SiGe on insulator (SGOI) substrate is a typical SOI substrate. A SGOI substrate may include a strained SiGe layer on an insulation layer. The SiGe layer of the substrate often provides high carrier mobility and low contact capacitance. For this reason, when the SGOI substrate is used as a substrate to form transistors, the short channel effect may be suppressed and transistor performance may be improved.
However, SGOI wafers are generally expensive due to complexity of their formation processes. Further, transistors formed on SGOI substrates are difficult to be integrated with semiconductor devices formed on silicon substrates.
Therefore, there is a need to provide a transistor and a method for forming the transistor with suppressed short channel effect.